=============================================================================== I understand that your school uses Mentor Graphics software and have submitted chips. I would like you to answer a couple questions when you have the opportunity. 1. Which product are you using to design your IC's (GDT or IC station). 2. What type of problems have you encountered with our software that has affected the submission process. 3. Is there any other problem you have encountered in your submission process that you would like to see resolved? =============================================================================== Ron: We used v7.0 (Chipgraph) several years ago (Fall 1989) for our IC design class, but we were unable to submit designs due to some limitations in the toolkit at that time. The primary problem was the lack of support for layout extraction, back annotation, and hence simulation of IC layouts, due to the fact that MGC was using Dracula from Cadence at that time (and Cadence wasn't giving away software to universities that were using the MGC tools). The MOSIS support was minimal to non-existent at that time, although we did get a pad frame set up and at least got a pretty picture that might have worked. We just did not feel safe sending it out for fab without better verification. For the Fall 1990 and 1991 offerings of the course, we used MULGA from AT&T and the Octtools from Berkeley. We were able to submit several chips using those tools, but they are a little too research oriented (that is, buggy) for instructional use. Responses to your questions: 1. We will be using the IC Station product for our Fall 1992 offering. 2. Not applicable (yet). 3. We anticipate some problems with standard cell library support for the MOSIS runs. The Octtools supported the MSU standard cells; we would like to see similar support in the Mentor Graphics environment. I believe that the current Version 8.0 distribution only includes an EDIF output program, and no input functionality. We would like to have the ability to input EDIF, so that we can input previously developed designs. I read an article in IEEE Circuits & Devices Magazine recently that mentioned a MOSIS support kit from Mentor Graphics. Could you send me some information on what that includes? Can I get that by contacting the usual representative (Julie Hansen, I think)? Joseph B. Evans Assistant Professor, Department of Electrical & Computer Engineering Telecommunications & Information Sciences Laboratory University of Kansas | Internet: evans@tisl.ukans.edu Lawrence, KS 66045-2228 | evans@ece.ukans.edu (913) 864-4830 | Bitnet: evans%tisl@ukanvax.bitnet