(Excerpt from Chapter 9 of the MOSIS User Manual)


9.2.2. Full Wafer Runs - Project vs. Chip Size
  A  MOSIS  chip  has  a  fixed  starting  frame  plus  a payload area for user
projects.  The MOSIS Standard Frame surrounds the chip perimeter and reserves a
horizontal  area  across  the  top  of  the  chip  for  identification markings
(including the Run-ID and the two-letter Fab-ID).

  These identification markings and other overhead (scribe lanes,  etc.)  cause
the  user  payload  area  to  be  200 x 300 microns smaller than the chip.  For
example, the MOSIS standard project size of 6900 x 6800 (for  a  medium  chip),
plus this overhead, produces a chip that is 7100 microns square.

  Below are the four standard MOSIS chip sizes. Any project that is larger than
this maximum project size requires an  oversize  chip  and  is  treated  as  an
oversize  project.   At this time, we cannot guarantee that an oversize project
can be fabricated unless specific arrangements  are  made  in  advance  of  the
run-closing date.


                        Die Size                    Maximum Project Size

Chip    	Size in Mils    Size in Microns     Payload Size (MM)>

Tiny (3um)    	100 x 150       2540 x 3811             2.3 x 3.4

Tiny (2um)      100 x 105       2540 x 2667             2.22 x 2.25

Small   	190 x 280       4826 x 7112             4.6 x 6.8

Medium  	280 x 280       7112 x 7112             6.9 x 6.8

Large   	320 x 375       8218 x 9779             7.9 x 9.2

  Your  project  will  be placed in the smallest chip size that can accommodate
it. Projects from the same organization may be grouped in one  chip.    If  the
projects  are  small,  up  to  four  projects can be packed on a "multi-project
chip".  See Section 5.2.5 for more details on this SHARE option.

9.2.3. Stepper Runs
  Because MOSIS 1.6 and 1.2 micron runs utilize stepper  (reticle)  technology,
they  do  not  use  standard chip sizes.  Please contact MOSIS to book space on
these runs (see the Fabrication Schedule notes on these runs in Section 13.1 of
the Reference Section).

9.2.4. Quantities
  The  number  of packaged parts you receive from MOSIS depends on the physical
size of your project.  If your project is on a small chip size, you receive  12
parts;  on  a medium chip, you receive 18 parts; and on a large chip, 24 parts.
Additional packaged parts may be requested in  increments  of  6  parts.  These
quantities are for <full wafer lithography runs only.

  To  order  more than the standard number of parts, use the parameter QUANTITY
in your NEW-PROJECT or ONE-STEP Submission Request. 

  Reticle 1.6 and 1.2 micron runs receive 50 packaged parts (minimum lot).