DIRECTORY OF MOSIS CELL LIBRARIES, current to 09-25-90 OBTAINING LIBRARY FILES To obtain Cell Library files, type your request in the following format: REQUEST: LIBRARY LIBRARY: FILE: , is one of the MOSIS Libraries listed below, and is the name of a file residing in the indicated cell library. You may obtain a list of a library's files by simply requesting: REQUEST: LIBRARY LIBRARY: SCP20_PADS (for example) ************************* SUPPORTED LIBRARIES *************************** LIBRARY FEATURE MM-DD-YY MM-DD-YY NAME TECH SIZE DESCRIPTION CREATED MODIFIED ------------------------------------------------------------------------- CMOSN_20A NSCT 1.2,2.0 Mosis Standard Cells 11-14-89 07-11-90 *(CMOSN_20A is available ONLY ON TAPE -- see note below) ************************ UNSUPPORTED LIBRARIES ************************** LIBRARY FEATURE MM-DD-YY MM-DD-YY NAME TECH SIZE DESCRIPTION CREATED MODIFIED ------------------------------------------------------------------------- SCN20_PADS SCN 2.0 Mosis TinyChip Pads 07-05-88 12-07-90 SCP20_PADS SCP 2.0 Mosis TinyChip Pads 03-08-89 12-07-90 CIT_SCN20_PADS SCN 2.0 CIT(Seitz)TinyChip Pads 07-05-88 03-27-90 SCN16_PADS SCN 1.6 Mosis TinyChip Pads 11-22-88 09-25-90 SCN12_PADS SCN 1.2 Mosis TinyChip Pads 07-13-89 09-25-90 OVERSIZE_SCN12_PADS SCN 1.2 Higher current Pads 11-15-89 03-27-90 *************************** INFORMATION ONLY **************************** LIBRARY FEATURE MM-DD-YY MM-DD-YY NAME TECH SIZE DESCRIPTION CREATED MODIFIED ------------------------------------------------------------------------- STD_FRAMES none 0.0 Standard Frame Pad Locs 12-23-86 08-17-87 Notes ******************************************************************** CMOSN_20A library This standard cell library (with RAM and ROM generators) is available ONLY ON TAPE, after signing a non-redistribution license agreement & paying the (approx.) $225 maintenance/tape handling charge. To obtain more information about this library, send the following request to MOSIS: REQUEST: INFORMATION TOPIC: CMOSN_20A REQUEST: END NOTE TO MAGIC USERS: It is suggested that MAGIC users utilize the version of this library available from the Institute for Technology Development. For more information, contact Jim Keyy at (601) 325-2284. KEY TO THE ABOVE TABLE: LIBRARY NAME is the name of the library. Note that some libraries, such as ones holding cell revisions, reference prior libraries for the remainder of the cell set. TECH gives the technology name of the cells in the library. Most technologies are NOT compatible with each other, and no checking of incompatible technologies is made (other than the usual CIF rejection of unknown layer names). FEATURE SIZE gives the minimum poly gate width of the smallest transistor (equal to twice 'LAMBDA'). DESCRIPTION gives the source of the cells, their overall nature, and any special library or technology features, such as a non-standard number of METAL layers, for example. MM-DD-YY CREATED gives the library installation date (month, day, and year. MM-DD-YY MODIFIED gives the date of any changes to the library. Note, however, that cells of the library never change -- rather, a new library is installed, supplying any cell updates, and referencing the old library as a subset. So, although no changes are made to the original library's cells, the MM-DD-YY MODIFIED date alerts users to check the original library's documentation for update information. NOTE ON REMARKS: Remarks files contain user-contributed reports on library cells, and are accessed by the LIBRARY file request in the MOSIS mail service: REQUEST: LIBRARY LIBRARY: FILE: .REM SPECIAL NOTE ON PAD LIBRARIES: PAD CELLS are not generally scalable, because of absolute pad size restrictions and the electrical differences between linear vrs. area scaling. Thus, scalable libraries are usually broken into two libraries, one containing the non-pad cells and one containing pads. @"MINFOVIS:LIBINF.DOC ; Built: 7-DEC-1990 15:44 (JWS) @"mosis_data:[cell_libraries]libraries.doc Following is a brief summary of the library cells and documentation files available from MOSIS. Each library contains a documentation file (.DOC) and a .CIF file (.CIF) which includes all the cells of the library. In addition, some libraries contain individual .CIF files for each cell (.CIF), and possibly a Remarks file (.REM), which provides usage notes for the library. Other (NON ELECTRICALLY-MAILABLE) formats such as Calma GDS2 exist for some libraries: contact MOSIS for information including a possible tape charge fee. To obtain any on-line file, ask for it in a LIBRARY request to MOSIS: REQUEST: LIBRARY LIBRARY: FILE: Technology Description -------------------------------------------------------- SCN20_PADS SCN 2.0 Mosis TinyChip Pads This 2 micron SCN (N-well) TinyChip pads set was designed with the MOSIS scalable CMOS design rules at a lambda of 1 micron. All pads are laid out on a lambda grid and are designed to be used with the 40PC22X22 Standard Frame. When submitting a project to MOSIS using this pad set, you must specify the technology as 'SCN' or 'SCE'. This set contains six pad frame cells, I/O, IN, OUT, Vdd, Ground, and a blank pad, plus two corner pad cells for supplying Vdd and Ground to the pad ring. Also, there is a separate complete pad frame cell for analog uses: its pads have no buffers -- just static voltage protection diodes. 5914 VDD.CIF;4 5968 SCN20_PADS.DOC;5 121152 SCN20_PADS.CIF;4 25664 OUT.CIF;4 25726 IO.CIF;4 25756 IN.CIF;4 6520 GND.CIF;4 5024 CV_R.CIF;2 5124 CV.CIF;4 4162 CG_R.CIF;2 4214 CG.CIF;4 5250 BLANK.CIF;4 15158 ANALOG.CIF;6 53258 40PC22X22_STUFFED_ANALOG.CIF;6 53258 40PC22X22_STUFFED.CIF;4 SCP20_PADS SCP 2.0 Mosis TinyChip Pads This 2 micron SCP (P-well) TinyChip pads set was designed with the MOSIS scalable CMOS design rules at a lambda of 1 micron. All pads are laid out on a lambda grid and are designed to be used with the 40PC22X22 Standard Frame. When submitting a project to MOSIS using this pad set, you must specify the technology as 'SCP' or 'SCE'. This set contains six pad frame cells, I/O, IN, OUT, Vdd, Ground, and a blank pad, plus two corner pad cells for supplying Vdd and Ground to the pad ring. Also, there is a separate complete pad frame cell for analog uses: its pads have no buffers -- just static voltage protection diodes. 7502 VDD.CIF;6 2932 UR.CIF;2 5820 SCP20_PADS.DOC;7 111408 SCP20_PADS.CIF;3 23032 OUT.CIF;4 4212 LL.CIF;2 23062 IO.CIF;4 23036 IN.CIF;4 7484 GND.CIF;6 8338 BLANK.CIF;6 17708 ANALOG.CIF;6 37898 40PC22X22_STUFFED_ANALOG.CIF;6 43258 40PC22X22_STUFFED.CIF;6 CIT_SCN20_PADS SCN 2.0 CIT(Seitz)TinyChip Pads This 2 micron SCN (N-well) TinyChip pads set was designed with MAGIC. When submitting a project to MOSIS using this pad set, you must specify the technology as 'SCN' or 'SCE'. This set contains seven cells, GNDPAD, INPAD, NULPAD, OUTPAD, SCHMITTPAD, TRIPAD, and VDDPAD. MOSIS believes that these MAGIC .MAG files will read in without design rule violations under Rev6 of the SCMOS MAGIC technology file. 1704 VDDPAD.MAG;1 17078 TRIPAD.MAG;1 12470 SCHMITTPAD.MAG;1 16124 OUTPAD.MAG;1 4856 NULPAD.MAG;1 8032 INPAD.MAG;1 1484 GNDPAD.MAG;1 1394 CIT_SCN20_PADS.DOC;2 2250 40P22X22_STUFFED.MAG;1 SCN16_PADS SCN 1.6 Mosis TinyChip Pads This 1.6 micron SCN (N-well) TinyChip pads set was designed with the MOSIS scalable CMOS design rules at a lambda of 0.8 micron. All pads are laid out on a lambda grid and are designed to be used with the 40PC22X22 Standard Frame. When submitting a project to MOSIS using this pad set, you must specify the technology as 'SCN' or 'SCE'. This set contains six pad frame cells, I/O, IN, OUT, Vdd, Ground, and a blank pad, plus two corner pad cells for supplying Vdd and Ground to the pad ring. 5812 VDD.CIF;4 1394 SCN16_PADS.DOC;3 182392 SCN16_PADS.CIF;2 31998 OUT.CIF;4 45134 IO.CIF;4 32064 IN.CIF;4 5648 GND.CIF;4 4182 CV_R.CIF;4 4058 CV.CIF;4 1820 CG_R.CIF;4 1844 CG.CIF;4 5174 BLANK.CIF;4 52038 40PC22X22_STUFFED.CIF;4 SCN12_PADS SCN 1.2 Mosis TinyChip Pads This 1.2 micron SCN (N-well) TinyChip pads set was designed with the MOSIS scalable CMOS design rules (rev 6) at a lambda of 0.6 micron. You should obtain the newest Magic technology (dated no earlier than 7/1/88) from MOSIS to use these pads. All pads are laid out on a lambda grid. When submitting a project to MOSIS using this pad set, you must specify the technology as 'SCN' or 'SCE' (if you wrote the CIF file with both wells), and set the LAMBDA to 0.6 MICRON. This set contains six pad frame cells, IO, IN, OUT, VDD, GND, and a BLANK pad, plus two corner pad cells for supplying Vdd and Ground to the pad ring. 8166 VDD.CIF;4 3902 TR.CIF;4 3974 TL.CIF;4 5558 SCN12_PADS.DOC;9 238574 SCN12_PADS.CIF;2 44364 OUT.CIF;4 48454 IO.CIF;4 44260 IN.CIF;4 7984 GND.CIF;4 3034 BR.CIF;4 7538 BLANK.CIF;4 3156 BL.CIF;4 71122 40PC19X19_STUFFED.CIF;4 OVERSIZE_SCN12_PADS SCN 1.2 Higher current Pads This 1.2 micron SCN (N-well) pads set was designed with the MOSIS scalable CMOS design rules (rev 6) at a lambda of 0.6 micron. These are higher current (and larger size) versions of some of the pads from the standard SCN12_PADS pad library. However, these pads won't fit into the TinyChip pad frame, and are essentially uncharacterized, but are known to be functional. 21460 VDD.CIF;2 21208 TL.CIF;2 1812 SPACER.CIF;2 1666 OVERSIZE_SCN12_PADS.DOC;5 241278 OVERSIZE_SCN12_PADS.CIF;2 54438 OUT.CIF;2 56816 INB.CIF;2 46428 IN.CIF;2 22982 GND.CIF;2 21286 BLANK.CIF;2 STD_FRAMES none 0.0 Standard Frame Pad Locs The MOSIS service offers standard frames as an alternative to custom project frames where every project pad layout is unique. A standard project frame is a rectangular area of a fixed size and with a fixed set of bonding pad locations around the periphery of the rectangle. The circuitry in the remainder of the frame, the routing of pad connections, and the choice of pad types at each of the fixed locations are up to the user. Standard frames are available in six sizes and four different pad counts, for a total of eleven standard frames as listed in the documentation. 11084 STD_FRAMES.DOC;4 112 STANDARD_FRAMES.LIST;1 11598 STANDARD-FRAMES.INF;7 374 PARCBASIC.LIST;1 1140 PARCBASIC.CIF;1 2228 84P79X92.LIST;1 3418 84P79X92.CIF;1 2228 84P69X68.LIST;1 3418 84P69X68.CIF;1 1710 64P79X92.LIST;1 2846 64P79X92.CIF;1 1710 64P69X68.LIST;1 2850 64P69X68.CIF;1 1710 64P46X68.LIST;1 2846 64P46X68.CIF;1 1178 40PC22X22.LIST;3 5274 40PC22X22.CIF;1 1086 40P69X68.LIST;1 2126 40P69X68.CIF;1 1084 40P46X68.LIST;1 2126 40P46X68.CIF;1 854 28PC23X34.LIST;3 1708 28PC23X34.CIF;2 928 28P23X34.LIST;3 1890 28P23X34.CIF;3