Topic: MOSIS_3UMSPICE [ ATTENTION ALL MOSIS LIAISONS AND USERS: Effective October 1, 1989 the CIF-CHECKSUM parameter must be provided to MOSIS before designs will be put into the fabrication queue. This change is being made to protect the data integrity of your design files. Please see information TOPIC: CHKSUM for more information. ] CMOS 3UM SPICE PARAMETERS Two typical examples of CMOS/Bulk 3um SPICE (Level 2) parameters from recent MOSIS wafer runs are listed in this section. Corner SPICE parameters at 2um and BSIM models at 2um and below are in development. Users should note that the SPICE model parameters for individual wafer runs are obtained via transistor DC curve fitting using a parameter optimizer. These Level 2 parameters are treated as empirical parameters allowing the optimizer to change parameters (often in ways that have little or no physical significance) for best curve fit to measured transistor curves. The simulated test circuit (inverters and ring oscillator) performances are accurate to within 10% to 20% of measured performance. CMOS 3UM SPICE MODEL PARAMETERS M81W SPICE PARAMETERS (UTMC) .MODEL CMOSN NMOS LEVEL=2 LD=0.414747U TOX=505.000E-10 + NSUB=1.35634E+16 VTO=0.864893 KP=44.9E-06 GAMMA=0.981 + PHI=0.6 UO=656.0 UEXP=0.211012 UCRIT=107603 + DELTA=3.53172 VMAX=100000 XJ=0.400000U LAMBDA=0.0107351 + NFS=1E+11 NEFF=1.001 NSS=1E+12 TPG=1.000000 + RSH=9.925000 CGDO=2.83588E-10 CGSO=2.83588E-10 CGBO=7.968E-10 + CJ=0.0003924 MJ=0.456300 CJSW=5.284E-10 MJSW=0.319900 PB=0.700000 * Weff = WDrawn - Delta_W * The suggested Delta_W = 1.166 UM .MODEL CMOSP PMOS LEVEL=2 LD=0.706557U TOX=505.0E-10 + NSUB=2.66646E+15 VTO=-0.944048 KP=18.5E-06 GAMMA=0.435 + PHI=0.6 UO=271.0 UEXP=0.242315 UCRIT=20581.4 + DELTA=4.32096E-05 VMAX=33274.4 XJ=0.400000U LAMBDA=0.0620118 + NFS=1E+11 NEFF=1.001 NSS=1E+12 TPG=-1.000000 + RSH=10.250000 CGDO=4.83117E-10 CGSO=4.83117E-10 CGBO=1.293E-09 + CJ=0.0001307 MJ=0.424700 CJSW=4.613E-10 MJSW=0.218500 PB=0.750000 * Weff = WDrawn - Delta_W * The suggested Delta_W = 1.892 UM ****** M82Y SPICE PARAMETERS (HP) .MODEL CMOSN NMOS LEVEL=2 LD=0.580687U TOX=432.0E-10 + NSUB=1E+16 VTO=0.858448 KP=4.8E-05 GAMMA=0.721 + PHI=0.6 UO=600 UEXP=0.114596 UCRIT=37014.9 + DELTA=1.81015 VMAX=50264.3 XJ=0.400000U LAMBDA=0.00666661 + NFS=1E+11 NEFF=1.001 NSS=1E+12 TPG=1.000000 + RSH=28.3 CGDO=4.64146E-10 CGSO=4.64146E-10 CGBO=4.5197E-10 + CJ=0.0003838 MJ=0.504300 CJSW=4.498E-10 MJSW=0.282600 PB=0.700000 *Weff = WDrawn - Delta_W *The suggested Delta_W= 0.5834 UM .MODEL CMOSP PMOS LEVEL=2 LD=0.542617U TOX=432.0E-10 + NSUB=3E+15 VTO=-0.884424 KP=1.6E-05 GAMMA=0.395 + PHI=0.6 UO=200 UEXP=0.257904 UCRIT=65652.9 + DELTA=1.95189 VMAX=25740 XJ=0.400000U LAMBDA=0.0442567 + NFS=1E+11 NEFF=1.001 NSS=1E+12 TPG=-1.000000 + RSH=107.6 CGDO=4.33717E-10 CGSO=4.33717E-10 CGBO=9.9784E-10 + CJ=0.0002347 MJ=0.508900 CJSW=3.795E-10 MJSW=0.239100 PB=0.740000 *Weff = WDrawn - Delta_W *The suggested Delta_W= 1.288 UM ***** TYPICAL CMOS 3UM AC PARASITIC CAPACITANCES Following is a set of typical ranges of parasitic capacitances observed on MOSIS 3um CMOS/Bulk devices. These numbers are typical limits without means specified because the values are multi-modal when data is taken on the ensemble of all fabricators. Standard deviations for each fabricator are typically smaller then the range given. Layer - Layer Thickness Capacitance Tox 500 - 600 A 5.6 - 6.7 E-4 pF/u**2 poly - substrate 7000 - 8500 A .39 - .48 E-4 pF/u**2 metal - substrate 1.4 - 1.7 u .20 - .24 E-4 pF/u**2 metal - diff 9000 - 9500 A .35 - .37 E-4 pF/u**2 metal - poly 8000 - 9300 A .36 - .43 E-4 pF/u**2 metal2 - substrate 2.5 - 2.9 u .12 - .16 E-4 pF/u**2 metal2 - metal 1.1 - 1.3 u .26 - .31 E-4 pF/u**2 metal2 - poly 1.8 - 2.2 u .15 - .19 E-4 pF/u**2 N+ Junction Area - - - 1.6 - 5.0 E-4 pF/u**2 N+ Junction Side Wall - - - 2.0 - 3.3 E-4 pF/u P+ Junction Area - - - 2.8 - 5.0 E-4 pF/u**2 P+ Junction Side Wall - - - 1.6 - 5.4 E-4 pF/u CMOS 3UM WORST CASE SPICE PARAMETERS The worst case parameters are based upon our published process targets, however, the parameters were not generated using the optimizer. No MOSIS run has ever reached worst case limits. We have no physical devices that can be measured to refine the worst case parameters. When (or if) such devices become available, we will optimize the worst case parameter set. Minimum current parameters: TYPE NMOS PMOS LEVEL 2.000 2.000 VTO 1.000 -1.000 KP 3.77D-05 1.26D-05 GAMMA 1.500 0.700 PHI 0.600 0.600 LAMBDA 1.60D-02 4.70D-02 CGSO 5.20D-10 4.00D-10 CGDO 5.20D-10 4.00D-10 RSH 30.000 70.000 CJ 2.20D-04 3.50D-04 MJ 0.500 0.500 CJSW 00D-10 2.00D-10 MJSW 0.330 0.330 TOX 5.50D-08 5.50D-08 NSUB 1.00D+16 1.12D+14 NSS 0.00D+00 0.00D+00 NFS 1.20D+12 8.80D+11 TPG 1.000 -1.000 XJ 6.00D-07 4.00D-07 LD 3.20D-07 4.80D-07 UO 600.000 200.000 UCRIT 9.99D+05 1.60D+04 UEXP 0.001 0.150 VMAX 1.00D+05 1.00D+05 NEFF 0.010 0.010 DELTA 1.200 1.900 **** Maximum current parameters: TYPE NMOS PMOS LEVEL 2.000 2.000 VTO 0.500 0.500 KP 4.60D-05 1.53D-05 GAMMA 1.000 0.600 PHI 0.600 0.600 LAMBDA 1.60D-02 4.70D-02 CGSO 5.20D-10 4.00D-10 CGDO 5.20D-10 4.00D-10 RSH 10.000 30.000 CJ 1.80D-04 3.00D-04 MJ 0.500 0.500 CJSW 3.00D-10 2.00D-10 MJSW 0.330 0.330 TOX 50D-08 .50D-08 NSUB 1.00D+16 1.12D+14 NSS 0.00D+00 0.00D+00 NFS 1.23D+12 8.79D+11 TPG 1.000 -1.000 XJ 1.00D-06 8.00D-07 LD 6.40D-07 8.00D-07 UO 600.000 00.000 UCRIT 9.99D+05 1.60D+04 UEXP 0.001 0.153 VMAX 1.00D+05 1.00D+05 NEFF .010 0.010 DELTA 1.200 1.900