TINYCHIP PROJECTS The MOSIS Service Contents: I. Intro II. 3um TinyChip A. Specifications B. Project Submission III. 2um TinyChip A. Specifications B. Project Submission ********* I. Introduction The MOSIS Service is offering a new standard die size, called TinyChip which is now available at 2um as well as 3um. Four packaged parts of 3um feature size cost $550; four packaged parts of 2um cost $500. TinyChip projects are now available on all MOSIS runs with the 3um TinyChip] in CMOS P-well technology and the 2um in CMOS N-well and P-well. Tinychips can now be packaged when a standard frame is NOT used as long as the number of pads is 40 or less. If you use the PADS and SIZE option, MOSIS will do a bondability check when the project is submitted to 1) confirm that the number of pads is 40 or less, and 2) make sure a bonding diagram can be generated automatically by MOSIS. Projects will be packaged as follows: 1 - 28 pads: 28 pin DIP 29 - 40 pads: 40 pin DIP 0 pads: Parts will not be packaged More than 40 pads: MOSIS will ask designer to resubmit project with 40 pads or less. **NOTE: Your TinyChip projects MUST be submitted with the required TinyChip parameters to be fabricated and charged correctly as TinyChips. The requisite submission parameters are covered in the 'Project Submission' sections of this document. TinyChip spares are not shipped to customers because the low cost of TinyChips does not allow us to have the packager sort the extra chips. COST FOR SINGLE PROJECT (PACKAGED)* ======================================================== MAXIMUM PROJECT TECHNOLOGY SIZE (mm) QUANTITIES PRICE ======================================================== CMOS 3um 2.3 x 3.4 4 $550 TinyChip CMOS 2um 2.22 x 2.25 4 $500 TinyChip ======================================================== * Please see the online Price Schedule for non-commercial prices. II. 3um TinyChip IIA. Specifications The available design area is 2.3 x 3.4 millimeters. A 3um TinyChip project MUST be CMOS/Bulk, P-well, double metal technology and must be designed using the following: a. MOSIS' 3um design rules (scalable OR nonscalable), generic process specification and corner SPICE decks. b. Either the MOSIS Standard Frame (40PC22X22) or the PADS and SIZE option (see 'Introduction'). To get a copy of the TinyChip Pads Set as well as CIF and documentation files for the TinyChip Pad Frame pad locations, send a REQUEST message in the following format to MOSIS@MOSIS.EDU: REQUEST: LIBRARY LIBRARY: SCP30_PADS FILE: SCP30_PADS.CIF, SCP30_PADS.DOC FILE: 28P23x34.CIF REQUEST: END For more information on MOSIS Standard Frames, request the following: REQUEST: INFO TOPIC: PACK_BOND REQUEST: END An OPTIONAL ('Stuffed') frame can also be used: a. 'Stuffed' standard frame with 26 pre-placed I/O pad drivers, plus one power, one ground. This frame is optional and is available only for projects designed to the MOSIS scalable CMOS design rules. IIB. Submitting your 3um TinyChip Project to MOSIS Three micron projects designed with the scalable rules must have 'TINY-SCP' (or 'TINY-SCG' or 'TINY-SCE') in their NEW-PROJECT request: TECHNOLOGY: TINY-SCP LAMBDA: 1.5 STD_FRAME: 28PC23X34 III. 2um TinyChip Projects IIIA. 2um TinyChip Specifications 2um TinyChip must be designed with MOSIS scalable rules. The 2um TinyChip project size is 2220X2250 microns. MOSIS' Stuffed Frame is available in the same style as the 3um padframe. MOSIS has defined a 2um TinyChip padframe which has 40 pads rather than the 3um's 28 pads. To obtain this frame, use the following syntax: REQUEST: LIBRARY LIBRARY: SCN20_PADS FILE: SCN20_PADS.DOC, 40PC22X22_STUFFED.CIF FILE: 40PC22X22_STUFFED_ANALOG.CIF REQUEST: END Padframe information for P-well can be obtained in the same format, replacing "SCN" with "SCP" in your message, e.g., SCP20_PADS. To get a CIF plot and list of pad locations of the MOSIS 2um TinyChip Frame, send a message as follows: REQUEST: LIBRARY LIBRARY: STD_FRAMES FILE: 40PC22X22.CIF, 40PC22X22.LIST REQUEST: END IIIB. 2um TinyChip Project Submission NEW-PROJECT submissions MUST contain the following parameters in order to be fabricated as packaged TinyChips: TECHNOLOGY: TINY-SCE (or TINY-SCN or TINY-SCP) LAMBDA: 1.0 STD-FRAME: 40PC22X22 (or PADS/SIZE option) The MOSIS Service 11/1/89