Tester Loaner Program Introductory Message INTRODUCTION: Thank you for your interest in the VLSI Functional Tester Loaner Program. This program is administered on a voluntary basis by the Integrated Systems Laboratory at USC Information Sciences Institute. The purpose of the program is to provide VLSI designers with access to low-cost functional test systems to support education as well as research. THE OFFER: A limited number of loaner test systems are available on a first-come-first-served basis to non-commercial MOSIS users. These systems are provided by commercial test system manufacturers who have joined the Loaner Program. These systems are selected and configured specifically for MOSIS Tiny-Chips educational users but are also available in versions to support the research needs of the community. The loaner evaluation period provides the user with direct exposure to functional test systems that are tailored to his specific needs. The Loaner Program also provides the user an opportunity to purchase systems from the manufacturer at a substantial discount. These test systems can be used to meet the testing guidelines established by NSF for MOSIS educational users. PARTICIPATION: Only MOSIS non-commercial users are eligible for the Loaner Program. If you wish to participate in the Loaner Program, please review the attached technical document describing the available test systems and respond to this message. Your response should indicate that you qualify for the Loaner program and state your equipment and timing requirements. Please provide us with as much lead time as possible to accommodate your needs. Upon receipt of your request, we will forward an Equipment and Materials Agreement that must be signed and returned. A confirmation message will be sent to you after receipt of the signed agreement and forms. The manufacturer of the loaner equipment has agreed to provide limited application instruction and has requested the option to schedule a sales call at your convenience during the loaner period. The equipment must be returned as directed, within one week after the end of the loaner period. you have the option of purchasing the test system from the manufacturer at the loaner program group rate. Additionally, we require a report from you within 30 days after the loan period ends describing the results of the evaluation. This data will be used to fulfill reporting requirements to equipment manufacturers and government sponsors; this information will be used to define potential product improvements. GETTING STARTED: To get the process started, please send a reply message including: the optimum time for you to borrow the tester, your name, the organization, address where the tester will be used, and your telephone number. Soon after we receive this information from you, we'll send you an agreement. Please direct any replies, questions or addition requests you may have to loaner@venera.isi.edu or: USC/Information Sciences Institute Loaner Programs / Janna Tuckett 4676 Admiralty Way Marina del Rey, CA 90292-6695 We Hope To Hear From You Soon! The Loaner Program Currently Available Test Systems The Loaner Program presently offers test systems from three manufacturers; you should review the specifications and prices and make your request accordingly. These systems are available on a first-come first-served basis, and although the manufacturers have agreed to attempt to match the demand for systems, there is no guarantee that a system will be available when you need one. Please plan your requested evaluation period to coincide with a realistic estimate of your needs. Also, the longer the lead time, the better the chances for us to match your needs. The Digital Systems Incorporated, Model 4100 loan period is for 90 days; the Integrated Measurements Systems, Logic Master ST and the Tektronix LV 500 ASIC loan periods are for 60 days each. Digital Systems Incorporated Model 4100* DSI, Inc., offers a 32-pin version of Model STM4100 test system to MOSIS educational users for $1,995.00. (Units actually shipped under the Loaner Program are configured with 128 input and 128 output pins. This tester is a stand-alone unit connected via a cable to a user-supplied IBM-PC. The vector rates, determined by software, are limited to about 1 to 2 ms per vector. The system is optionally expandable to 256 pins and includes a user's manual, universal DIP adapter board, controller interface card, system software, and 2 hours of telephone application assistance. For further information on Model 4100 contact DSI directly at: Stan Dallas 7865 South West Nimbus Avenue Beaverton, Oregon 97005-3716 Portland, OR 97202 (503) 641-8618 * This product line was previously owned by CADIC. Integrated Measurements Systems Logic Master ST Integrated Measurement Systems, Inc. offers a 32-pin version of their Logic Master ST test system to MOSIS educational users for $19,500.00. (Units actually shipped under the loner Program are configured with 64 input pins, 64 output pins and 4 clock channels). This tester is a stand-alone unit connected to a user-supplied IBM-PC (other workstation interfaces are optional). Functional test rates of 20 MHz and edge placement resolution of 1 nsec. are supported by this tester. 4K bytes of memory are provided behind each pin (additional memory is optional) and set-up, hold, and propagation measurements are possible. The system can be expanded to 112 I/O pins plus 7 clock channels and includes a user manual, interface card, system software, and a universal DIP adapter socket. For further information on this or other IMS products, contact IMS directly at: Mr. John Serbin Integrated Measurement Systems, Inc. 9525 SW Gemini Drive Beaverton, Oregon 97005 (503) 626-6969 Tektronix LV-500 ASIC Tektronix offers a 64 pin version of their LV-500 ASIC tester to MOSIS educational users for $27,500.00. The basic 64 channel version is available to MOSIS users for a 60 day evaluation period. With a simple, menu driven interface, this unit offers users the ability to functionally verify designs, as well as characterize circuit parameters such as logic or power thresholds, and propagation delay with a minimum of test development time. Clock speeds up to 50 Mhz sync/async are possible. Test vectors may be aligned on any of 4/16 clocks (4 clk/64 pins up to 16 clk/256 pins) with 500 psec edge resolution. Memory depth of 64K per pin is standard, with each pin capable of functioning as a force/compare/tristate channel. The functional reassignment of each pin can be made "on-the-fly", as well as changing clock speeds during a single test. Software is available to quickly translate simulation files into a complete test program. Units can be purchased with up to 256 pins. Each unit includes a user manual, system software, tutorial DUT cards, and a standard socket DUT card. For further information on this or TEKTRONIX products contact your local sales office, or: Clayton Moore P.O. Box 500 Beaverton, OR 97077 (503) 629-1970