creating entire chip running bdsyn to generate logic running espresso to minimize logic running misII to synthesize design WARNING: uses as primary input arrival time the value (0.00,0.00) WARNING: uses as primary input drive the value (0.20,0.20) WARNING: uses as primary output load the value 1.00 WARNING: uses as primary output required time the value (0.00,0.00) running padplace padplace: Message: VERSION 5.4 : Aug 16 1991 Placement of pads for "as4:logic:contents;" Random placement: b<3> (TOP,0.63) Random placement: sign<0> (BOTTOM,0.62) Random placement: a<2> (BOTTOM,0.26) Random placement: b<2> (RIGHT,0.43) Random placement: a<1> (BOTTOM,0.76) Random placement: b<1> (BOTTOM,0.37) Random placement: a<0> (TOP,0.76) Random placement: carry_in<0> (BOTTOM,0.19) Random placement: b<0> (BOTTOM,0.54) Random placement: a<3> (LEFT,0.57) Random placement: s<4> (LEFT,0.29) Random placement: s<3> (RIGHT,0.10) Random placement: s<2> (BOTTOM,0.76) Random placement: s<1> (TOP,0.35) Random placement: s<0> (RIGHT,0.54) running octflatten octflatten: VERSION 5.00 : Aug 16 1991 running wolfe to place and route wolfe version 1.8 last edited 4/26/91 TimberWolfSC version:v4.2c date:Aug 16 1991 Standard Cell Placement and Global Routing Program Authors: Carl Sechen, Kai-Win Lee, Bill Swartz, Mindy Lee, and Dahe Chen Yale University 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 running chipstats chipstats: Version 1.0 : Chip as4:placed Number of instances = 57 Number of nets = 69 Number of connectors = 373 Number of vias = 253 Average instance area = 2952.00 St.dev. instance area = 1029.32 Chip Area W x H = 569 x 571 Chip Area = 324899.00 (100.00%) Total Instance Area = 168264.00 ( 51.79%) Routing + Empty Area = 156635.00 ( 48.21%) Total net area = 132145.00 Total net length = 31295.00 Average net length = 453.55 St.dev. net length = 451.16 ***** 6 LONGEST NETS (---) NAME LENGTH (lambda) AREA (lambda^2) ( 1) GROUND 2464.00 26852.00 ( 2) SUPPLY 2332.00 25796.00 ( 3) b<2> 1328.50 3985.50 ( 4) sign<0> 1222.00 3666.00 ( 5) a<0> 1126.00 3378.00 ( 6) a<1> 995.50 2986.50 creating single 8-bit adder/subtractor running bdnet running octflatten octflatten: VERSION 5.00 : Aug 16 1991 running wolfe wolfe version 1.8 last edited 4/26/91 Randomly assigning formal terminal a<7> to BOTTOM at 0.629 Randomly assigning formal terminal a<6> to RIGHT at 0.624 Randomly assigning formal terminal a<5> to RIGHT at 0.263 Randomly assigning formal terminal a<4> to LEFT at 0.430 Randomly assigning formal terminal a<3> to RIGHT at 0.756 Randomly assigning formal terminal a<2> to RIGHT at 0.368 Randomly assigning formal terminal a<1> to BOTTOM at 0.758 Randomly assigning formal terminal a<0> to RIGHT at 0.192 Randomly assigning formal terminal b<7> to RIGHT at 0.544 Randomly assigning formal terminal b<6> to TOP at 0.573 Randomly assigning formal terminal b<5> to TOP at 0.285 Randomly assigning formal terminal b<4> to LEFT at 0.096 Randomly assigning formal terminal b<3> to RIGHT at 0.760 Randomly assigning formal terminal b<2> to BOTTOM at 0.346 Randomly assigning formal terminal b<1> to LEFT at 0.538 Randomly assigning formal terminal b<0> to TOP at 0.298 Randomly assigning formal terminal sign to BOTTOM at 0.758 Randomly assigning formal terminal s<8> to LEFT at 0.423 Randomly assigning formal terminal s<7> to BOTTOM at 0.475 Randomly assigning formal terminal s<6> to TOP at 0.950 Randomly assigning formal terminal s<5> to LEFT at 0.020 Randomly assigning formal terminal s<4> to RIGHT at 0.698 Randomly assigning formal terminal s<3> to RIGHT at 0.081 Randomly assigning formal terminal s<2> to RIGHT at 0.141 Randomly assigning formal terminal s<1> to TOP at 0.551 Randomly assigning formal terminal s<0> to BOTTOM at 0.638 TimberWolfSC version:v4.2c date:Aug 16 1991 Standard Cell Placement and Global Routing Program Authors: Carl Sechen, Kai-Win Lee, Bill Swartz, Mindy Lee, and Dahe Chen Yale University 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 running chipstats creating single 8-bit cordic unit running bdnet running octflatten octflatten: VERSION 5.00 : Aug 16 1991 running wolfe wolfe version 1.8 last edited 4/26/91 Randomly assigning formal terminal li<7> to BOTTOM at 0.629 Randomly assigning formal terminal li<6> to RIGHT at 0.624 Randomly assigning formal terminal li<5> to RIGHT at 0.263 Randomly assigning formal terminal li<4> to LEFT at 0.430 Randomly assigning formal terminal li<3> to RIGHT at 0.756 Randomly assigning formal terminal li<2> to RIGHT at 0.368 Randomly assigning formal terminal li<1> to BOTTOM at 0.758 Randomly assigning formal terminal li<0> to RIGHT at 0.192 Randomly assigning formal terminal ri<7> to RIGHT at 0.544 Randomly assigning formal terminal ri<6> to TOP at 0.573 Randomly assigning formal terminal ri<5> to TOP at 0.285 Randomly assigning formal terminal ri<4> to LEFT at 0.096 Randomly assigning formal terminal ri<3> to RIGHT at 0.760 Randomly assigning formal terminal ri<2> to BOTTOM at 0.346 Randomly assigning formal terminal ri<1> to LEFT at 0.538 Randomly assigning formal terminal ri<0> to TOP at 0.298 Randomly assigning formal terminal sign to BOTTOM at 0.758 Randomly assigning formal terminal lo<8> to LEFT at 0.423 Randomly assigning formal terminal lo<7> to BOTTOM at 0.475 Randomly assigning formal terminal lo<6> to TOP at 0.950 Randomly assigning formal terminal lo<5> to LEFT at 0.020 Randomly assigning formal terminal lo<4> to RIGHT at 0.698 Randomly assigning formal terminal lo<3> to RIGHT at 0.081 Randomly assigning formal terminal lo<2> to RIGHT at 0.141 Randomly assigning formal terminal lo<1> to TOP at 0.551 Randomly assigning formal terminal lo<0> to BOTTOM at 0.638 Randomly assigning formal terminal ro<8> to TOP at 0.667 Randomly assigning formal terminal ro<7> to TOP at 0.542 Randomly assigning formal terminal ro<6> to BOTTOM at 0.397 Randomly assigning formal terminal ro<5> to RIGHT at 0.968 Randomly assigning formal terminal ro<4> to BOTTOM at 0.331 Randomly assigning formal terminal ro<3> to RIGHT at 0.102 Randomly assigning formal terminal ro<2> to RIGHT at 0.189 Randomly assigning formal terminal ro<1> to TOP at 0.109 Randomly assigning formal terminal ro<0> to BOTTOM at 0.377 TimberWolfSC version:v4.2c date:Aug 16 1991 Standard Cell Placement and Global Routing Program Authors: Carl Sechen, Kai-Win Lee, Bill Swartz, Mindy Lee, and Dahe Chen Yale University 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 running chipstats done creating chip