MODEL control_store oe<0>, ! control for output enable (L) wwe<0>, ! control for weight write enable (L) cs<0>, ! chip select (L) ldWout<0>, ! load weight out (H) ldWin<0>, ! load weight internal (H) ldX<0>, ! load X (H) ldE<0>, ! load Error (H) ldD<0>, ! load Desired (H) ldY<0>, ! load Y (H) countQ<0>, ! increment Q (L) countR<0>, ! increment R (L) ldUin<0>, ! load mu internal (H) ldUex<0>, ! load mu external (H) (also load M0,M1,clrY,and /clrQ) ldAddr<0>, ! load X and W address (L) clrXaddr<0>, ! clr X address (L) clrWaddr<0>, ! clr W address (L) incrXaddr<0>, ! increment X address (H) incrWaddr<0>, ! increment W address (H) clrR<0>, ! clear R (H) ckpoint<0>, ! hold intermediate value of lfsr nextState<4:0> = phi<0>, ! input to determine if next state can be entered lfsr<6:0>, ! output from lfsr reset<0>, ! start over (H) presState<4:0>; ! present state of control ! state assignments CONSTANT ST0=0, ST1=1, ST2=2, ST3=3, ST4=4, ST5=5, ST6=6, ST7=7, ST8=8, ST9=9, ST10=10, ST11=11, ST12=12, ST13=13, ST14=14, ST15=15, ST16=16, ST17=17, ST18=18, ST19=19, ST20=20; ! symbolic output assignments CONSTANT LO=0, HI=1; ROUTINE control_module; ! set up default outputs (use of multiple assignment) nextState<4:0> = presState<4:0>; IF reset<0> THEN BEGIN nextState<4:0> = ST0; END; SELECT presState FROM [ST0]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=HI; ldAddr=LO; clrXaddr=LO; clrWaddr=LO; incrXaddr=LO; incrWaddr=LO; clrR=HI; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST1; END ELSE BEGIN nextState = ST0; END; END; END; [ST1]: BEGIN oe=HI; wwe=HI; cs=LO; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST2; END ELSE BEGIN nextState = ST1; END; END; END; [ST2]: BEGIN oe=LO; wwe=HI; cs=LO; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST3; END ELSE BEGIN nextState = ST2; END; END; END; [ST3]: BEGIN oe=LO; wwe=HI; cs=LO; ldWout=LO; ldWin=HI; ldX=HI; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST4; END ELSE BEGIN nextState = ST3; END; END; END; [ST4]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=HI; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST5; END ELSE BEGIN nextState = ST4; END; END; END; [ST5]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=HI; incrWaddr=HI; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST6; END ELSE BEGIN nextState = ST5; END; END; END; [ST6]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN ckpoint = lfsr<6> OR lfsr<5> OR lfsr<3> OR lfsr<2> OR lfsr<1>; IF ((NOT(ckpoint)) AND lfsr<0>) THEN BEGIN nextState = ST7; END ELSE BEGIN nextState = ST1; END; END ELSE BEGIN nextState = ST6; END; END; END; [ST7]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=HI; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST8; END ELSE BEGIN nextState = ST7; END; END; END; [ST8]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=HI; ldE=LO; ldD=HI; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST9; END ELSE BEGIN nextState = ST8; END; END; END; [ST9]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=HI; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=LO; clrWaddr=LO; incrXaddr=LO; incrWaddr=LO; clrR=HI; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST10; END ELSE BEGIN nextState = ST9; END; END; END; [ST10]: BEGIN oe=HI; wwe=HI; cs=LO; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST11; END ELSE BEGIN nextState = ST10; END; END; END; [ST11]: BEGIN oe=LO; wwe=HI; cs=LO; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST12; END ELSE BEGIN nextState = ST11; END; END; END; [ST12]: BEGIN oe=LO; wwe=HI; cs=LO; ldWout=LO; ldWin=HI; ldX=HI; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST13; END ELSE BEGIN nextState = ST12; END; END; END; [ST13]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=HI; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=LO; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST14; END ELSE BEGIN nextState = ST13; END; END; END; [ST14]: BEGIN oe=LO; wwe=HI; cs=HI; ldWout=HI; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST15; END ELSE BEGIN nextState = ST14; END; END; END; [ST15]: BEGIN oe=LO; wwe=LO; cs=LO; ldWout=HI; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=HI; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST16; END ELSE BEGIN nextState = ST15; END; END; END; [ST16]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=HI; incrWaddr=HI; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST17; END ELSE BEGIN nextState = ST16; END; END; END; [ST17]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN ckpoint = lfsr<6> OR lfsr<5> OR lfsr<4> OR lfsr<3> OR lfsr<2> OR lfsr<1>; IF ((NOT (ckpoint)) AND lfsr<0>) THEN BEGIN nextState = 18; END ELSE BEGIN nextState = ST10; END; END ELSE BEGIN nextState = ST17; END; END; END; [ST18]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=LO; countR=HI; ldUin=HI; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST19; END ELSE BEGIN nextState = ST18; END; END; END; [ST19]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=HI; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=HI; incrXaddr=LO; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST20; END ELSE BEGIN nextState = ST19; END; END; END; [ST20]: BEGIN oe=HI; wwe=HI; cs=HI; ldWout=LO; ldWin=LO; ldX=LO; ldE=LO; ldD=LO; ldY=LO; countQ=HI; countR=HI; ldUin=LO; ldUex=LO; ldAddr=LO; clrXaddr=HI; clrWaddr=LO; incrXaddr=HI; incrWaddr=LO; clrR=LO; IF reset THEN BEGIN nextState = ST0; END ELSE BEGIN IF phi THEN BEGIN nextState = ST1; END ELSE BEGIN nextState = ST20; END; END; END; ENDSELECT; ENDROUTINE; ENDMODEL;