# # Formal Terminal description for final:logic # padp recognizes the following keywords: # TERMTYPE (SUPPLY | GROUND | SIGNAL | CLOCK) : DEFAULT = SIGNAL # DIRECTION (INPUT | OUTPUT | INOUT) : DEFAULT = INOUT # PEAKCURRENT ( x (in Amperes)) : DEFAULT = 0.0 # NOTE: PEAKCURRENT applies only to SUPPLY and GROUND terminals # TERM_FLOATING_EDGES (ALL | {LEFT|RIGHT|TOP|BOTTOM}) # TERM_EDGE (LEFT | RIGHT | TOP | BOTTOM) : DEFAULT = none # TERM_ROW ( 0 | 1 | 2 | ... | n) : DEFAULT = 0 # TERM_RELATIVE_POSITION ( 0.0 <= x <= 1.0) : DEFAULT = none # TERM_RELATIVE_POSITION_STEP ( 0.0 <= x <= 1.0) : DEFAULT = 0.0 # This file uses a 'REVERSE' logic: # First you specify the properties # then the terminal for which the props apply TERMTYPE SIGNAL DIRECTION INPUT FORMAL_TERMINAL l1<7> FORMAL_TERMINAL l1<6> FORMAL_TERMINAL l1<5> FORMAL_TERMINAL l1<4> FORMAL_TERMINAL l1<3> FORMAL_TERMINAL l1<2> FORMAL_TERMINAL l1<1> FORMAL_TERMINAL l1<0> FORMAL_TERMINAL l2<7> FORMAL_TERMINAL l2<6> FORMAL_TERMINAL l2<5> FORMAL_TERMINAL l2<4> FORMAL_TERMINAL l2<3> FORMAL_TERMINAL l2<2> FORMAL_TERMINAL l2<1> FORMAL_TERMINAL l2<0> FORMAL_TERMINAL l3<7> FORMAL_TERMINAL l3<6> FORMAL_TERMINAL l3<5> FORMAL_TERMINAL l3<4> FORMAL_TERMINAL l3<3> FORMAL_TERMINAL l3<2> FORMAL_TERMINAL l3<1> FORMAL_TERMINAL l3<0> FORMAL_TERMINAL l4<7> FORMAL_TERMINAL l4<6> FORMAL_TERMINAL l4<5> FORMAL_TERMINAL l4<4> FORMAL_TERMINAL l4<3> FORMAL_TERMINAL l4<2> FORMAL_TERMINAL l4<1> FORMAL_TERMINAL l4<0> FORMAL_TERMINAL l5<7> FORMAL_TERMINAL l5<6> FORMAL_TERMINAL l5<5> FORMAL_TERMINAL l5<4> FORMAL_TERMINAL l5<3> FORMAL_TERMINAL l5<2> FORMAL_TERMINAL l5<1> FORMAL_TERMINAL l5<0> FORMAL_TERMINAL l6<7> FORMAL_TERMINAL l6<6> FORMAL_TERMINAL l6<5> FORMAL_TERMINAL l6<4> FORMAL_TERMINAL l6<3> FORMAL_TERMINAL l6<2> FORMAL_TERMINAL l6<1> FORMAL_TERMINAL l6<0> FORMAL_TERMINAL l7<7> FORMAL_TERMINAL l7<6> FORMAL_TERMINAL l7<5> FORMAL_TERMINAL l7<4> FORMAL_TERMINAL l7<3> FORMAL_TERMINAL l7<2> FORMAL_TERMINAL l7<1> FORMAL_TERMINAL l7<0> FORMAL_TERMINAL l8<7> FORMAL_TERMINAL l8<6> FORMAL_TERMINAL l8<5> FORMAL_TERMINAL l8<4> FORMAL_TERMINAL l8<3> FORMAL_TERMINAL l8<2> FORMAL_TERMINAL l8<1> FORMAL_TERMINAL l8<0> FORMAL_TERMINAL r1<7> FORMAL_TERMINAL r1<6> FORMAL_TERMINAL r1<5> FORMAL_TERMINAL r1<4> FORMAL_TERMINAL r1<3> FORMAL_TERMINAL r1<2> FORMAL_TERMINAL r1<1> FORMAL_TERMINAL r1<0> FORMAL_TERMINAL r2<7> FORMAL_TERMINAL r2<6> FORMAL_TERMINAL r2<5> FORMAL_TERMINAL r2<4> FORMAL_TERMINAL r2<3> FORMAL_TERMINAL r2<2> FORMAL_TERMINAL r2<1> FORMAL_TERMINAL r2<0> FORMAL_TERMINAL r3<7> FORMAL_TERMINAL r3<6> FORMAL_TERMINAL r3<5> FORMAL_TERMINAL r3<4> FORMAL_TERMINAL r3<3> FORMAL_TERMINAL r3<2> FORMAL_TERMINAL r3<1> FORMAL_TERMINAL r3<0> FORMAL_TERMINAL r4<7> FORMAL_TERMINAL r4<6> FORMAL_TERMINAL r4<5> FORMAL_TERMINAL r4<4> FORMAL_TERMINAL r4<3> FORMAL_TERMINAL r4<2> FORMAL_TERMINAL r4<1> FORMAL_TERMINAL r4<0> FORMAL_TERMINAL r5<7> FORMAL_TERMINAL r5<6> FORMAL_TERMINAL r5<5> FORMAL_TERMINAL r5<4> FORMAL_TERMINAL r5<3> FORMAL_TERMINAL r5<2> FORMAL_TERMINAL r5<1> FORMAL_TERMINAL r5<0> FORMAL_TERMINAL r6<7> FORMAL_TERMINAL r6<6> FORMAL_TERMINAL r6<5> FORMAL_TERMINAL r6<4> FORMAL_TERMINAL r6<3> FORMAL_TERMINAL r6<2> FORMAL_TERMINAL r6<1> FORMAL_TERMINAL r6<0> FORMAL_TERMINAL r7<7> FORMAL_TERMINAL r7<6> FORMAL_TERMINAL r7<5> FORMAL_TERMINAL r7<4> FORMAL_TERMINAL r7<3> FORMAL_TERMINAL r7<2> FORMAL_TERMINAL r7<1> FORMAL_TERMINAL r7<0> FORMAL_TERMINAL r8<7> FORMAL_TERMINAL r8<6> FORMAL_TERMINAL r8<5> FORMAL_TERMINAL r8<4> FORMAL_TERMINAL r8<3> FORMAL_TERMINAL r8<2> FORMAL_TERMINAL r8<1> FORMAL_TERMINAL r8<0> FORMAL_TERMINAL reset DIRECTION OUTPUT FORMAL_TERMINAL out1<7> FORMAL_TERMINAL out1<6> FORMAL_TERMINAL out1<5> FORMAL_TERMINAL out1<4> FORMAL_TERMINAL out1<3> FORMAL_TERMINAL out1<2> FORMAL_TERMINAL out1<1> FORMAL_TERMINAL out1<0> FORMAL_TERMINAL out2<7> FORMAL_TERMINAL out2<6> FORMAL_TERMINAL out2<5> FORMAL_TERMINAL out2<4> FORMAL_TERMINAL out2<3> FORMAL_TERMINAL out2<2> FORMAL_TERMINAL out2<1> FORMAL_TERMINAL out2<0> FORMAL_TERMINAL out3<7> FORMAL_TERMINAL out3<6> FORMAL_TERMINAL out3<5> FORMAL_TERMINAL out3<4> FORMAL_TERMINAL out3<3> FORMAL_TERMINAL out3<2> FORMAL_TERMINAL out3<1> FORMAL_TERMINAL out3<0> FORMAL_TERMINAL out4<7> FORMAL_TERMINAL out4<6> FORMAL_TERMINAL out4<5> FORMAL_TERMINAL out4<4> FORMAL_TERMINAL out4<3> FORMAL_TERMINAL out4<2> FORMAL_TERMINAL out4<1> FORMAL_TERMINAL out4<0> FORMAL_TERMINAL out5<7> FORMAL_TERMINAL out5<6> FORMAL_TERMINAL out5<5> FORMAL_TERMINAL out5<4> FORMAL_TERMINAL out5<3> FORMAL_TERMINAL out5<2> FORMAL_TERMINAL out5<1> FORMAL_TERMINAL out5<0> FORMAL_TERMINAL out6<7> FORMAL_TERMINAL out6<6> FORMAL_TERMINAL out6<5> FORMAL_TERMINAL out6<4> FORMAL_TERMINAL out6<3> FORMAL_TERMINAL out6<2> FORMAL_TERMINAL out6<1> FORMAL_TERMINAL out6<0> FORMAL_TERMINAL out7<7> FORMAL_TERMINAL out7<6> FORMAL_TERMINAL out7<5> FORMAL_TERMINAL out7<4> FORMAL_TERMINAL out7<3> FORMAL_TERMINAL out7<2> FORMAL_TERMINAL out7<1> FORMAL_TERMINAL out7<0> FORMAL_TERMINAL out8<7> FORMAL_TERMINAL out8<6> FORMAL_TERMINAL out8<5> FORMAL_TERMINAL out8<4> FORMAL_TERMINAL out8<3> FORMAL_TERMINAL out8<2> FORMAL_TERMINAL out8<1> FORMAL_TERMINAL out8<0> FORMAL_TERMINAL out9<7> FORMAL_TERMINAL out9<6> FORMAL_TERMINAL out9<5> FORMAL_TERMINAL out9<4> FORMAL_TERMINAL out9<3> FORMAL_TERMINAL out9<2> FORMAL_TERMINAL out9<1> FORMAL_TERMINAL out9<0> FORMAL_TERMINAL out10<7> FORMAL_TERMINAL out10<6> FORMAL_TERMINAL out10<5> FORMAL_TERMINAL out10<4> FORMAL_TERMINAL out10<3> FORMAL_TERMINAL out10<2> FORMAL_TERMINAL out10<1> FORMAL_TERMINAL out10<0> FORMAL_TERMINAL out11<7> FORMAL_TERMINAL out11<6> FORMAL_TERMINAL out11<5> FORMAL_TERMINAL out11<4> FORMAL_TERMINAL out11<3> FORMAL_TERMINAL out11<2> FORMAL_TERMINAL out11<1> FORMAL_TERMINAL out11<0> FORMAL_TERMINAL out12<7> FORMAL_TERMINAL out12<6> FORMAL_TERMINAL out12<5> FORMAL_TERMINAL out12<4> FORMAL_TERMINAL out12<3> FORMAL_TERMINAL out12<2> FORMAL_TERMINAL out12<1> FORMAL_TERMINAL out12<0> FORMAL_TERMINAL out13<7> FORMAL_TERMINAL out13<6> FORMAL_TERMINAL out13<5> FORMAL_TERMINAL out13<4> FORMAL_TERMINAL out13<3> FORMAL_TERMINAL out13<2> FORMAL_TERMINAL out13<1> FORMAL_TERMINAL out13<0> FORMAL_TERMINAL out14<7> FORMAL_TERMINAL out14<6> FORMAL_TERMINAL out14<5> FORMAL_TERMINAL out14<4> FORMAL_TERMINAL out14<3> FORMAL_TERMINAL out14<2> FORMAL_TERMINAL out14<1> FORMAL_TERMINAL out14<0> FORMAL_TERMINAL out15<7> FORMAL_TERMINAL out15<6> FORMAL_TERMINAL out15<5> FORMAL_TERMINAL out15<4> FORMAL_TERMINAL out15<3> FORMAL_TERMINAL out15<2> FORMAL_TERMINAL out15<1> FORMAL_TERMINAL out15<0> FORMAL_TERMINAL out16<7> FORMAL_TERMINAL out16<6> FORMAL_TERMINAL out16<5> FORMAL_TERMINAL out16<4> FORMAL_TERMINAL out16<3> FORMAL_TERMINAL out16<2> FORMAL_TERMINAL out16<1> FORMAL_TERMINAL out16<0> TERMTYPE SUPPLY DIRECTION INPUT FORMAL_TERMINAL Vdd TERMTYPE GROUND FORMAL_TERMINAL GND TERMTYPE CLOCK FORMAL_TERMINAL clk1 FORMAL_TERMINAL clk2