# # Formal Terminal description for stage5:logic # padp recognizes the following keywords: # TERMTYPE (SUPPLY | GROUND | SIGNAL | CLOCK) : DEFAULT = SIGNAL # DIRECTION (INPUT | OUTPUT | INOUT) : DEFAULT = INOUT # PEAKCURRENT ( x (in Amperes)) : DEFAULT = 0.0 # NOTE: PEAKCURRENT applies only to SUPPLY and GROUND terminals # TERM_FLOATING_EDGES (ALL | {LEFT|RIGHT|TOP|BOTTOM}) # TERM_EDGE (LEFT | RIGHT | TOP | BOTTOM) : DEFAULT = none # TERM_ROW ( 0 | 1 | 2 | ... | n) : DEFAULT = 0 # TERM_RELATIVE_POSITION ( 0.0 <= x <= 1.0) : DEFAULT = none # TERM_RELATIVE_POSITION_STEP ( 0.0 <= x <= 1.0) : DEFAULT = 0.0 # This file uses a 'REVERSE' logic: # First you specify the properties # then the terminal for which the props apply TERMTYPE SIGNAL DIRECTION INPUT FORMAL_TERMINAL d1<7> FORMAL_TERMINAL d1<6> FORMAL_TERMINAL d1<5> FORMAL_TERMINAL d1<4> FORMAL_TERMINAL d1<3> FORMAL_TERMINAL d1<2> FORMAL_TERMINAL d1<1> FORMAL_TERMINAL d1<0> FORMAL_TERMINAL d2<7> FORMAL_TERMINAL d2<6> FORMAL_TERMINAL d2<5> FORMAL_TERMINAL d2<4> FORMAL_TERMINAL d2<3> FORMAL_TERMINAL d2<2> FORMAL_TERMINAL d2<1> FORMAL_TERMINAL d2<0> FORMAL_TERMINAL d3<7> FORMAL_TERMINAL d3<6> FORMAL_TERMINAL d3<5> FORMAL_TERMINAL d3<4> FORMAL_TERMINAL d3<3> FORMAL_TERMINAL d3<2> FORMAL_TERMINAL d3<1> FORMAL_TERMINAL d3<0> FORMAL_TERMINAL d4<7> FORMAL_TERMINAL d4<6> FORMAL_TERMINAL d4<5> FORMAL_TERMINAL d4<4> FORMAL_TERMINAL d4<3> FORMAL_TERMINAL d4<2> FORMAL_TERMINAL d4<1> FORMAL_TERMINAL d4<0> FORMAL_TERMINAL d5<7> FORMAL_TERMINAL d5<6> FORMAL_TERMINAL d5<5> FORMAL_TERMINAL d5<4> FORMAL_TERMINAL d5<3> FORMAL_TERMINAL d5<2> FORMAL_TERMINAL d5<1> FORMAL_TERMINAL d5<0> FORMAL_TERMINAL d6<7> FORMAL_TERMINAL d6<6> FORMAL_TERMINAL d6<5> FORMAL_TERMINAL d6<4> FORMAL_TERMINAL d6<3> FORMAL_TERMINAL d6<2> FORMAL_TERMINAL d6<1> FORMAL_TERMINAL d6<0> FORMAL_TERMINAL d7<7> FORMAL_TERMINAL d7<6> FORMAL_TERMINAL d7<5> FORMAL_TERMINAL d7<4> FORMAL_TERMINAL d7<3> FORMAL_TERMINAL d7<2> FORMAL_TERMINAL d7<1> FORMAL_TERMINAL d7<0> FORMAL_TERMINAL d8<7> FORMAL_TERMINAL d8<6> FORMAL_TERMINAL d8<5> FORMAL_TERMINAL d8<4> FORMAL_TERMINAL d8<3> FORMAL_TERMINAL d8<2> FORMAL_TERMINAL d8<1> FORMAL_TERMINAL d8<0> FORMAL_TERMINAL d9<7> FORMAL_TERMINAL d9<6> FORMAL_TERMINAL d9<5> FORMAL_TERMINAL d9<4> FORMAL_TERMINAL d9<3> FORMAL_TERMINAL d9<2> FORMAL_TERMINAL d9<1> FORMAL_TERMINAL d9<0> FORMAL_TERMINAL d10<7> FORMAL_TERMINAL d10<6> FORMAL_TERMINAL d10<5> FORMAL_TERMINAL d10<4> FORMAL_TERMINAL d10<3> FORMAL_TERMINAL d10<2> FORMAL_TERMINAL d10<1> FORMAL_TERMINAL d10<0> FORMAL_TERMINAL d11<7> FORMAL_TERMINAL d11<6> FORMAL_TERMINAL d11<5> FORMAL_TERMINAL d11<4> FORMAL_TERMINAL d11<3> FORMAL_TERMINAL d11<2> FORMAL_TERMINAL d11<1> FORMAL_TERMINAL d11<0> FORMAL_TERMINAL d12<7> FORMAL_TERMINAL d12<6> FORMAL_TERMINAL d12<5> FORMAL_TERMINAL d12<4> FORMAL_TERMINAL d12<3> FORMAL_TERMINAL d12<2> FORMAL_TERMINAL d12<1> FORMAL_TERMINAL d12<0> FORMAL_TERMINAL reset DIRECTION OUTPUT FORMAL_TERMINAL output5<7> FORMAL_TERMINAL output5<6> FORMAL_TERMINAL output5<5> FORMAL_TERMINAL output5<4> FORMAL_TERMINAL output5<3> FORMAL_TERMINAL output5<2> FORMAL_TERMINAL output5<1> FORMAL_TERMINAL output5<0> FORMAL_TERMINAL e1<7> FORMAL_TERMINAL e1<6> FORMAL_TERMINAL e1<5> FORMAL_TERMINAL e1<4> FORMAL_TERMINAL e1<3> FORMAL_TERMINAL e1<2> FORMAL_TERMINAL e1<1> FORMAL_TERMINAL e1<0> FORMAL_TERMINAL e2<7> FORMAL_TERMINAL e2<6> FORMAL_TERMINAL e2<5> FORMAL_TERMINAL e2<4> FORMAL_TERMINAL e2<3> FORMAL_TERMINAL e2<2> FORMAL_TERMINAL e2<1> FORMAL_TERMINAL e2<0> FORMAL_TERMINAL e3<7> FORMAL_TERMINAL e3<6> FORMAL_TERMINAL e3<5> FORMAL_TERMINAL e3<4> FORMAL_TERMINAL e3<3> FORMAL_TERMINAL e3<2> FORMAL_TERMINAL e3<1> FORMAL_TERMINAL e3<0> FORMAL_TERMINAL e4<7> FORMAL_TERMINAL e4<6> FORMAL_TERMINAL e4<5> FORMAL_TERMINAL e4<4> FORMAL_TERMINAL e4<3> FORMAL_TERMINAL e4<2> FORMAL_TERMINAL e4<1> FORMAL_TERMINAL e4<0> FORMAL_TERMINAL e5<7> FORMAL_TERMINAL e5<6> FORMAL_TERMINAL e5<5> FORMAL_TERMINAL e5<4> FORMAL_TERMINAL e5<3> FORMAL_TERMINAL e5<2> FORMAL_TERMINAL e5<1> FORMAL_TERMINAL e5<0> FORMAL_TERMINAL e6<7> FORMAL_TERMINAL e6<6> FORMAL_TERMINAL e6<5> FORMAL_TERMINAL e6<4> FORMAL_TERMINAL e6<3> FORMAL_TERMINAL e6<2> FORMAL_TERMINAL e6<1> FORMAL_TERMINAL e6<0> FORMAL_TERMINAL e7<7> FORMAL_TERMINAL e7<6> FORMAL_TERMINAL e7<5> FORMAL_TERMINAL e7<4> FORMAL_TERMINAL e7<3> FORMAL_TERMINAL e7<2> FORMAL_TERMINAL e7<1> FORMAL_TERMINAL e7<0> FORMAL_TERMINAL e8<7> FORMAL_TERMINAL e8<6> FORMAL_TERMINAL e8<5> FORMAL_TERMINAL e8<4> FORMAL_TERMINAL e8<3> FORMAL_TERMINAL e8<2> FORMAL_TERMINAL e8<1> FORMAL_TERMINAL e8<0> FORMAL_TERMINAL e9<7> FORMAL_TERMINAL e9<6> FORMAL_TERMINAL e9<5> FORMAL_TERMINAL e9<4> FORMAL_TERMINAL e9<3> FORMAL_TERMINAL e9<2> FORMAL_TERMINAL e9<1> FORMAL_TERMINAL e9<0> FORMAL_TERMINAL e10<7> FORMAL_TERMINAL e10<6> FORMAL_TERMINAL e10<5> FORMAL_TERMINAL e10<4> FORMAL_TERMINAL e10<3> FORMAL_TERMINAL e10<2> FORMAL_TERMINAL e10<1> FORMAL_TERMINAL e10<0> FORMAL_TERMINAL e11<7> FORMAL_TERMINAL e11<6> FORMAL_TERMINAL e11<5> FORMAL_TERMINAL e11<4> FORMAL_TERMINAL e11<3> FORMAL_TERMINAL e11<2> FORMAL_TERMINAL e11<1> FORMAL_TERMINAL e11<0> TERMTYPE SUPPLY DIRECTION INPUT FORMAL_TERMINAL Vdd TERMTYPE GROUND FORMAL_TERMINAL GND TERMTYPE CLOCK FORMAL_TERMINAL clk1 FORMAL_TERMINAL clk2