#
# Formal Terminal description for stage8:logic
# padp recognizes the following keywords:
# TERMTYPE (SUPPLY | GROUND | SIGNAL | CLOCK) : DEFAULT = SIGNAL
# DIRECTION (INPUT | OUTPUT | INOUT) : DEFAULT = INOUT
# PEAKCURRENT ( x (in Amperes)) : DEFAULT = 0.0
#   NOTE: PEAKCURRENT applies only to SUPPLY and GROUND terminals
# TERM_FLOATING_EDGES (ALL | {LEFT|RIGHT|TOP|BOTTOM})
# TERM_EDGE (LEFT | RIGHT | TOP | BOTTOM) : DEFAULT = none
# TERM_ROW ( 0 | 1 | 2 | ... | n) : DEFAULT = 0
# TERM_RELATIVE_POSITION ( 0.0 <= x <= 1.0) : DEFAULT = none
# TERM_RELATIVE_POSITION_STEP ( 0.0 <= x <= 1.0) : DEFAULT = 0.0

# This file uses a 'REVERSE' logic: 
# First you specify the properties
# then the terminal for which the props apply
	TERMTYPE SIGNAL
	DIRECTION INPUT
FORMAL_TERMINAL g1<7>
FORMAL_TERMINAL g1<6>
FORMAL_TERMINAL g1<5>
FORMAL_TERMINAL g1<4>
FORMAL_TERMINAL g1<3>
FORMAL_TERMINAL g1<2>
FORMAL_TERMINAL g1<1>
FORMAL_TERMINAL g1<0>
FORMAL_TERMINAL g2<7>
FORMAL_TERMINAL g2<6>
FORMAL_TERMINAL g2<5>
FORMAL_TERMINAL g2<4>
FORMAL_TERMINAL g2<3>
FORMAL_TERMINAL g2<2>
FORMAL_TERMINAL g2<1>
FORMAL_TERMINAL g2<0>
FORMAL_TERMINAL g3<7>
FORMAL_TERMINAL g3<6>
FORMAL_TERMINAL g3<5>
FORMAL_TERMINAL g3<4>
FORMAL_TERMINAL g3<3>
FORMAL_TERMINAL g3<2>
FORMAL_TERMINAL g3<1>
FORMAL_TERMINAL g3<0>
FORMAL_TERMINAL g4<7>
FORMAL_TERMINAL g4<6>
FORMAL_TERMINAL g4<5>
FORMAL_TERMINAL g4<4>
FORMAL_TERMINAL g4<3>
FORMAL_TERMINAL g4<2>
FORMAL_TERMINAL g4<1>
FORMAL_TERMINAL g4<0>
FORMAL_TERMINAL g5<7>
FORMAL_TERMINAL g5<6>
FORMAL_TERMINAL g5<5>
FORMAL_TERMINAL g5<4>
FORMAL_TERMINAL g5<3>
FORMAL_TERMINAL g5<2>
FORMAL_TERMINAL g5<1>
FORMAL_TERMINAL g5<0>
FORMAL_TERMINAL g6<7>
FORMAL_TERMINAL g6<6>
FORMAL_TERMINAL g6<5>
FORMAL_TERMINAL g6<4>
FORMAL_TERMINAL g6<3>
FORMAL_TERMINAL g6<2>
FORMAL_TERMINAL g6<1>
FORMAL_TERMINAL g6<0>
FORMAL_TERMINAL g7<7>
FORMAL_TERMINAL g7<6>
FORMAL_TERMINAL g7<5>
FORMAL_TERMINAL g7<4>
FORMAL_TERMINAL g7<3>
FORMAL_TERMINAL g7<2>
FORMAL_TERMINAL g7<1>
FORMAL_TERMINAL g7<0>
FORMAL_TERMINAL g8<7>
FORMAL_TERMINAL g8<6>
FORMAL_TERMINAL g8<5>
FORMAL_TERMINAL g8<4>
FORMAL_TERMINAL g8<3>
FORMAL_TERMINAL g8<2>
FORMAL_TERMINAL g8<1>
FORMAL_TERMINAL g8<0>
FORMAL_TERMINAL g9<7>
FORMAL_TERMINAL g9<6>
FORMAL_TERMINAL g9<5>
FORMAL_TERMINAL g9<4>
FORMAL_TERMINAL g9<3>
FORMAL_TERMINAL g9<2>
FORMAL_TERMINAL g9<1>
FORMAL_TERMINAL g9<0>
FORMAL_TERMINAL reset
	DIRECTION OUTPUT
FORMAL_TERMINAL output8<7>
FORMAL_TERMINAL output8<6>
FORMAL_TERMINAL output8<5>
FORMAL_TERMINAL output8<4>
FORMAL_TERMINAL output8<3>
FORMAL_TERMINAL output8<2>
FORMAL_TERMINAL output8<1>
FORMAL_TERMINAL output8<0>
FORMAL_TERMINAL dis1<7>
FORMAL_TERMINAL dis1<6>
FORMAL_TERMINAL dis1<5>
FORMAL_TERMINAL dis1<4>
FORMAL_TERMINAL dis1<3>
FORMAL_TERMINAL dis1<2>
FORMAL_TERMINAL dis1<1>
FORMAL_TERMINAL dis1<0>
FORMAL_TERMINAL dis2<7>
FORMAL_TERMINAL dis2<6>
FORMAL_TERMINAL dis2<5>
FORMAL_TERMINAL dis2<4>
FORMAL_TERMINAL dis2<3>
FORMAL_TERMINAL dis2<2>
FORMAL_TERMINAL dis2<1>
FORMAL_TERMINAL dis2<0>
FORMAL_TERMINAL dis3<7>
FORMAL_TERMINAL dis3<6>
FORMAL_TERMINAL dis3<5>
FORMAL_TERMINAL dis3<4>
FORMAL_TERMINAL dis3<3>
FORMAL_TERMINAL dis3<2>
FORMAL_TERMINAL dis3<1>
FORMAL_TERMINAL dis3<0>
FORMAL_TERMINAL dis4<7>
FORMAL_TERMINAL dis4<6>
FORMAL_TERMINAL dis4<5>
FORMAL_TERMINAL dis4<4>
FORMAL_TERMINAL dis4<3>
FORMAL_TERMINAL dis4<2>
FORMAL_TERMINAL dis4<1>
FORMAL_TERMINAL dis4<0>
FORMAL_TERMINAL dis5<7>
FORMAL_TERMINAL dis5<6>
FORMAL_TERMINAL dis5<5>
FORMAL_TERMINAL dis5<4>
FORMAL_TERMINAL dis5<3>
FORMAL_TERMINAL dis5<2>
FORMAL_TERMINAL dis5<1>
FORMAL_TERMINAL dis5<0>
FORMAL_TERMINAL dis6<7>
FORMAL_TERMINAL dis6<6>
FORMAL_TERMINAL dis6<5>
FORMAL_TERMINAL dis6<4>
FORMAL_TERMINAL dis6<3>
FORMAL_TERMINAL dis6<2>
FORMAL_TERMINAL dis6<1>
FORMAL_TERMINAL dis6<0>
FORMAL_TERMINAL dis7<7>
FORMAL_TERMINAL dis7<6>
FORMAL_TERMINAL dis7<5>
FORMAL_TERMINAL dis7<4>
FORMAL_TERMINAL dis7<3>
FORMAL_TERMINAL dis7<2>
FORMAL_TERMINAL dis7<1>
FORMAL_TERMINAL dis7<0>
FORMAL_TERMINAL dis8<7>
FORMAL_TERMINAL dis8<6>
FORMAL_TERMINAL dis8<5>
FORMAL_TERMINAL dis8<4>
FORMAL_TERMINAL dis8<3>
FORMAL_TERMINAL dis8<2>
FORMAL_TERMINAL dis8<1>
FORMAL_TERMINAL dis8<0>
	TERMTYPE SUPPLY
	DIRECTION INPUT
FORMAL_TERMINAL Vdd
	TERMTYPE GROUND
FORMAL_TERMINAL GND
	TERMTYPE CLOCK
FORMAL_TERMINAL clk1
FORMAL_TERMINAL clk2