eecs 665: compiler construction
spring 2018

essentials | announcements | homework | schedule

essentials

Instructor Garrett Morris Lab instructor April Wade
Email garrettm@ku.edu Email aprilwade@ku.edu
Office Eaton 2028 Office Eaton 3025
Office hours Tu 12:30—14:30
Th 15:00—17:00
Office hours Th 13:00—14:30
Fr 12:00—13:30
Lectures Tu Th 11:00-12:15
2420 LEEP2
Laboratories Tu 9:00—10:50 or
Th 14:30—16:20
1005D Eaton
Course website http://ittc.ku.edu/~garrett/eecs665s18/

syllabus

The syllabus is available here. The high-level objectives for this course are that students should be able to:

announcements

2/22 The lab 4 due date has been extended by one week. Lab 4 is now due on Thursday, March 1st at 11:59 PM.
There will be no office hours on Feburary 22nd, as the campus is closed. Professor Morris will have extra office hours from 10-2 on Feburary 23rd.
2/18 The homework 1 due date has been extended 1 week. Homework 1 is now due on Monday, March 5th at 11:59 PM.
1/10 There will be no labs the first week of class.

laboratories

Number Slides Due date Download Sample solutions
1 Lab1.pdf Thursday, February 1, 11:59 PM Lab1.hs Lab1Solutions.hs
2 Lab2.pdf Thursday, Feburary 8, 11:59 PM Lab2.hs Lab2Solutions.hs
3 Thursday, February 15, 11:59 PM Lab3.zip Lab3Solutions.hs
4 Thursday, March 1, 11:59 PM Lab4.zip
Data.hs
data
Loader.hs
5 Thursday, March 15, 11:59 PM Lab5.zip
lab5.ll
6 Thursday, March 29, 11:59 PM Lab6.zip Lab6.hs
7 Thursday, April 5, 11:59PM Lab7.zip Lab7.hs
8 Thursday, April 12, 11:59 PM Lab8.zip Lab8.hs
9 Thursday, April 26, 11:59 PM Lab9.hs
10 Thursday, May 3, 11:59 PM Lab10.zip

homework

Number Due date Specification Download Sample solutions
1 Monday, March 5, 11:59 PM HW1 HW1.zip
2 Monday, April 16, 11:59 PM HW2 HW2.zip
3 Thursday, May 3, 11:59 PM HW3 HW3.zip

schedule

date topics slides other
1/16 Introduction and course objectives
History of compilers
01 Intro.pdf
1/18
1/23
The x86 and x86lite architectures 02 X86lite.pdf
1/25
1/30
2/1
2/6
Writing x86lite assembly
Mixed Haskell/assembly programming
Compiling expressions to assembly
Simple optimizations
2/8
2/13
2/15
Intermediate languages
LLVMlite
Representing structs and arrays
03 LLVMlite.pdf
2/27
3/1
Representing structs and arrays
Alignment
3/6
3/8
3/13
Control-flow graphs
Definitions and uses
Fixed points
Register allocation
Appel, ch. 10 and 11
3/27
3/29
4/3
Register allocation for tree-structured programs
Dominators and dominator trees
Register allocation for SSA
Constructing SSA programs
Appel, 18.1, 19.1, 19.2
Hack et al., "Register allocation for programs in SSA-form"
4/10
4/12
Lexing
Lexer generators
Appel, ch. 2
4/19
4/24
LL(k) parsing Appel, 3.1, 3.2
4/26
5/1
LR(k) parsing Appel, 3.3, 3.4